Language: English | Size: 591 MB | Duration: 4h 33m
VLSI - This is where design meets fabrication
What you'll learn
Draw layout from scratch, i.e. right from tech files to metal layer
Understand each and every mask level, through appropriate fabrication steps
Get to know how physical design flow communicates with CMOS fabrication process
This is how 2 different industries communicate
Requirements
Basic terms of CMOS, NMOS, PMOS
A brief summary of my existing course on 'Circuit design and SPICE simulations' will help, but can do even without that course
A brief knowledge of my existing courses on physical design flow and static timing analysis will also help
Description
Physical designers and CMOS fabrication team communicates with each other, and this course says it 'How?'
While physical designers use all the outputs from experiments performed by fabrication department, this course will nstrate the best of both worlds and connect them through exchange of certain files in certain format
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FILE LIST
Filename
Size
~Get Your Files Here !/01 - Introduction/001 Course content.mp4
7.4 MB
~Get Your Files Here !/01 - Introduction/001 Course content_en.vtt
6.5 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/001 Create active regions.mp4
16.6 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/001 Create active regions_en.vtt
13.9 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/002 Formation of N-well and P-well.mp4
10.8 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/002 Formation of N-well and P-well_en.vtt
8.7 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/003 Formation of gate terminal.mp4
14.2 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/003 Formation of gate terminal_en.vtt
11.8 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/004 Lightly doped drain (LDD) formation.mp4
12.5 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/004 Lightly doped drain (LDD) formation_en.vtt
10.5 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/005 Source drain formation.mp4
7.6 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/005 Source drain formation_en.vtt
6.3 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/006 Local interconnect formation.mp4
11.4 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/006 Local interconnect formation_en.vtt
9.7 KB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/007 Higher level metal formation.mp4
16 MB
~Get Your Files Here !/02 - Inception of layout - CMOS fabrication process/007 Higher level metal formation_en.vtt
12.6 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/001 INV.mag.html
1.3 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/002 min2.tech.html
7.9 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/003 Corner stitching introduction.mp4
19.9 MB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/003 Corner stitching introduction_en.vtt
14.2 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/004 Corner stitch to planes to tiles.mp4
16.1 MB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/004 Corner stitch to planes to tiles_en.vtt
11 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/005 Active tile types and tech file content.mp4
19.4 MB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/005 Active tile types and tech file content_en.vtt
14 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/006 Contacts and styles.mp4
15.9 MB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/006 Contacts and styles_en.vtt
11.6 KB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/007 Connect section for circuit extraction.mp4
18.3 MB
~Get Your Files Here !/03 - Introduction to ‘corner stitching’ and ‘tech files’/007 Connect section for circuit extraction_en.vtt
13.5 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/001 Introduction to DRC and lambda design rules.mp4
22 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/001 Introduction to DRC and lambda design rules_en.vtt
13.4 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/002 Poly extension and poly to diffusion spacing rules.mp4
26.3 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/002 Poly extension and poly to diffusion spacing rules_en.vtt
14.4 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/003 Poly to diffusion spacing and diffusion contact width rules.mp4
20.9 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/003 Poly to diffusion spacing and diffusion contact width rules_en.vtt
11.7 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/004 Metal1 width and poly to metal1 spacing rules.mp4
15.5 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/004 Metal1 width and poly to metal1 spacing rules_en.vtt
8.4 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/005 Contact spacing and minimum active width rules.mp4
25.1 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/005 Contact spacing and minimum active width rules_en.vtt
11.3 KB
~Get Your Files Here !/04 - Design rule checking (DRC)/006 From logic to layout to SPICE.mp4
18.7 MB
~Get Your Files Here !/04 - Design rule checking (DRC)/006 From logic to layout to SPICE_en.vtt
11.3 KB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/001 Introduction to simple path, euler's path and euler's circuit.mp4
16.9 MB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/001 Introduction to simple path, euler's path and euler's circuit_en.vtt
14.3 KB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/002 Introduction to stick diagram.mp4
18.7 MB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/002 Introduction to stick diagram_en.vtt
14.8 KB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/003 Derive actual dimension from stick diagram.mp4
41.1 MB
~Get Your Files Here !/05 - Introduction to euler's path and stick diagram/003 Derive actual dimension from stick diagram_en.vtt
14.1 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/001 Pre-layout simulation.mp4
17.5 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/001 Pre-layout simulation_en.vtt
13.1 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/002 Layout using 'only' stick diagram.mp4
17.4 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/002 Layout using 'only' stick diagram_en.vtt
14.3 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/003 Euler's path for Fn - Input gate ordering.mp4
12.9 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/003 Euler's path for Fn - Input gate ordering_en.vtt
10.7 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/004 Improved stick diagram for new gate input ordering.mp4
15.5 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/004 Improved stick diagram for new gate input ordering_en.vtt
12.6 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/005 Abstract layout from stick diagram.mp4
21 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/005 Abstract layout from stick diagram_en.vtt
14.4 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/006 Derive actual dimension for Fn.mp4
24.8 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/006 Derive actual dimension for Fn_en.vtt
15.1 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/007 Script to create layout.mp4
23.1 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/007 Script to create layout_en.vtt
14.2 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/008 draw_fn.tcl.html
2.6 KB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/009 Final layout and inputoutput labelling.mp4
51.2 MB
~Get Your Files Here !/06 - Art of layout using Euler's path plus Stick diagram/009 Final layout and inputoutput labelling_en.vtt
14 KB
~Get Your Files Here !/07 - Conclusion, acknowledgements and what next!!!/001 fn_prelayout.cir.html
946 B
~Get Your Files Here !/07 - Conclusion, acknowledgements and what next!!!/002 fn_postlayout.mag.html
3.1 KB
~Get Your Files Here !/07 - Conclusion, acknowledgements and what next!!!/003 Post-layout simulation and conclusion.mp4
16.2 MB
~Get Your Files Here !/07 - Conclusion, acknowledgements and what next!!!/003 Post-layout simulation and conclusion_en.vtt